XENIA is an equipment dedicated to developers working with programmable logic devices by Xilinx or even other vendors like Atmel and Altera. It consists of an advanced emulator of Serial Configuration PROMs for Field-Programmable Gate Arrays (FPGAs) and JTAG programmer for Xilinx Complex Programmable Logic Devices (CPLDs) compatible with Xilinx Parallel Cable III.

Serial configuration PROMs (SCPs) are often used as a FPGA configuration data source in applications where FPGA work stand-alone or in cooperation with embedded microcontroller such as PIC® MCU. SCPs are either one time programmable or even reprogrammable but with limited number of cycles. Also, the manipulation during an application development is not very comfortable. XENIA solves all these problems. XENIA also contains a JTAG programmer.

XENIA emulates Xilinx SCP families XC1700L, XC1700E, XC17S00, XC17S00XL, XC17S00A and XC18V00 (with an pin converter XEN18V) and compatible devices by other vendors (Atmel). JTAG interface supports all Xilinx CPLDs - XC95xx/XL/XV and CoolRunner.

Emulator supports wide range of application operational voltage - 5 V, 3.3 V and 2.5 V. The internal memory capacity is 32Mbit, which is enough for all existring Xilinx FPGAs (Virtex, Virtex 2.5 V, Spartan/XL, Spartan II, XC4000E/XLA, XC5200, XC3000A/L, etc.).

XENIA is fast - the complete memory is transferred from PC to XENIA in few seconds.

There is an overvoltage protection (up to 12 V) between emulator and target application.

XENIA has built-in rechargeable battery. That enables user to configure FPGAs even in the areas which are not easy accessible (e.g. the PC cannot be moved there).

XENIA works with the configuration clock up to 15 MHz (fast configuration mode).

Emulator status is indicated by LEDs.

As data source for XENIA is used a MCS file in Intel-HEX format which is generated by PROMGEN application (part of the Xilinx development system) from the file BIT.

Moreover, the JTAG interface compatible with Xilinx Parallel Cable III is implemented. It supports the 3.3 V and 5 V logic levels. The user can program, verify and test FPGAs and CPLDs (XC9500/XL, XCR - Cool Runner) directly in system.


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Supported devices

  • Serial Configuration PROMs Xilinx XC17xx and compatible
  • Serial Configuration PROMs Xilinx XC18xx (with XEN18V pin converter)
  • All Xilinx CPLDs and FPGAs with JTAG interface


  • Data I/Os 5 V/3.3 V/2.5 V compatible, overvoltage protection
  • Memory size: 32Mbit
  • CCLK frequency up to 15 MHz
  • JTAG programmer with 5 V/3 V support (In-System Programming and Boundary Scan)
  • Emulated SCP connection - emulation header DIP08
  • JTAG inteface: JTAG cable with hooks
  • PC interface: standard parallel port
  • Power supply 12 V DC (adaptor), accumulator 9 V (recharge possible during standard operation)
  • Dimensions: 68 x 132 x 33 mm


  • XENIA incl. built in accumulator 9 V
  • Emulation header DIP08
  • JTAG cable
  • Special LPT connection cable
  • Power supply
  • Software
  • User's Manual

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